1. Field of the Invention
The present invention relates to a display panel, and more particularly to a display panel with an electrode structure that enhances stable addressing.
2. Discussion of the Related Art
A typical display panel includes a panel unit and a drive unit.
FIG. 1 shows a typical structure for a 3-electrode surface discharging type plasma display panel (PDP). FIG. 2 shows how a single cell of the panel of FIG. 1 operates.
Referring to FIG. 1 and FIG. 2, address electrode lines (A1, A2, . . . , Am), dielectric layers 102 and 110, Y electrode lines (Y1, . . . , Yn), X electrode lines (X1, . . . , Xn), fluorescent layers 112, barrier walls 114 (not shown in FIG. 2), and a protective layer 104 are located between the front and rear glass substrates 100 and 106 of a typical surface discharging PDP 1.
The address electrode lines (A1, A2, . . . , Am) are formed on top of the rear glass substrate 106 in a regular pattern. A dielectric layer 110 is coated on top of the address electrode lines (A1, A2, . . . , Am). The barrier walls 114 are formed on top of the dielectric layer 110 in parallel with the address electrode lines (A1, A2, . . . , Am). These barrier walls 114 partition the discharge spaces of each display cell and prevent optical interference between display cells. The fluorescent layers 112 are formed between the barrier walls 114.
The X electrode lines (X1, . . . , Xn) and the Y electrode lines (Y1, . . . , Yn) are formed under the front glass substrate 100 in a regular pattern, orthogonal to the address electrode lines (A1, A2, . . . , Am), where each intersection corresponds to a display cell. Each X electrode line (X1, . . . , Xn) and Y electrode line (Y1, . . . , Yn) can be formed by combining transparent electrode lines (Xna, Yna) made of a transparent conductive material such as Indium Tin Oxide (ITO) with metal electrode lines (Xnb, Ynb), which enhance conductivity. The dielectric layer 102 covers the X electrode lines (X1, . . . , Xn) and Y electrode lines (Y1, . . . , Yn). A protective layer 104, which may be made of Mgo and protects the panel 1 from a strong electric field, covers the dielectric layer 102. A plasma producing gas is injected into the discharge cells 108 before the PDP is sealed.
The typical driving method for a PDP as described above allows initialization, address, and display sustaining stages to be sequentially performed in a unit sub-field. The electric charges of the display cells that are to be driven are uniform during the initialization stage. Electric charges for selected and non-selected display cells are determined during the address stage. Display discharge is performed in display cells during the display sustaining stage. During a cell discharge, plasma is formed from the display cell's plasma producing gas and ultraviolet rays produced by the plasma excite the fluorescent layers 112 of the display cells to create light.
In this case, since several unit sub-fields are included in a unit frame, a desired gradation can be displayed by the display sustaining time of each sub-field.
FIG. 3 illustrates a common drive device for the PDP 1 of FIG. 1.
Referring to FIG. 3, a common PDP drive device includes an image processor 300, a logic controller 302, an address driver 306, an X driver 308, and a Y driver 304. The image processor 300 converts an external analog image signal to a digital signal and creates an internal image signal, for example, 8 bit red (R), green (G), and blue (B) image data, a clock signal, and vertical and horizontal synchronizing signals. The logic controller 302 creates drive control signals (SA, SY, SX) according to the internal image signals coming from the image processor 300. The address driver 306 processes the address signals (SA) to create display data signals and applies these display data signals to the address electrode lines (A1, A2, . . . , Am). The X driver 308 processes the X drive control signal (SX) and applies it to the X electrode lines. The Y driver 304 processes a Y drive control signal (SY) and applies it to the Y electrode lines.
FIG. 4 shows a plan view of one example of the panel shown in FIG. 1 with a structure including black stripes 416 and transparent electrode lines (Xna, Yna) that are divided in each discharge cell by barrier walls 414 and are formed extending from metal electrode lines (Xnb, Ynb). The electrode structure illustrated in FIG. 4 may obtain a highly efficient discharge by eliminating unnecessary parts of the transparent electrode line (Xna, Yna) that are located on the barrier walls 414. Additionally, black stripes 416 can be included in the spaces between unit cells to enhance display panel contrast.
With the address electrode 500 structure shown in FIG. 5a, in order to increase the width of the discharge surface (C) at which the address electrode 500 and scanning (Y) electrode cross each other, the address electrode 500 width must be increased correspondingly. However, increasing the width of the address electrode increases the power needed for addressing discharge cells. This is the cause of high power consumption when presenting low gradation and reproducing moving pictures.
A protruded address electrode structure as shown in FIG. 5b may be provided to solve such problems. A protrusion 504 is included to function during address discharge and is located on the discharge surface where the address electrode (A) and scanning (Y) electrode cross each other. Additionally, address electrode portions other than the protrusion 504 are made of a relatively thin conductor material. Therefore, in addition to securing a sufficient address discharge area for stable discharge, the overall power consumption may be maintained. However, in the electrode structure of FIG. 5b, since the protrusions 504 are formed in parallel along the scanning electrode (Y), neighboring address electrodes may create electrical interference in an area indicated by reference number 506.